Cache coherence¶
Category: Parallelism · Status: stub
One line: Keeping several cached copies of the same data consistent when one of them is written — done in hardware between a CPU's cores, at a cost that false sharing exposes.
Also called: cache invalidation, write-back.
How it connects¶
- See also: False sharing, NUMA
Where to read more¶
- Notes: Cache coherence ↗
- Notes: cache invalidation ↗
- Notes: write-back with invalidation ↗
- Notes: shared data across different caches ↗
- Reference: Wikipedia: Cache coherence ↗